2 * Support for Intel Camera Imaging ISP subsystem.
3 * Copyright (c) 2015, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #ifndef _PixelGen_SysBlock_defs_h
16 #define _PixelGen_SysBlock_defs_h
18 /* Parematers and User_Parameters for HSS */
20 #define _PXG_PIXEL_BITS PixelWidth
21 #define _PXG_MAX_NOF_SID MaxNofSids
22 #define _PXG_DATA_BITS DataWidth
23 #define _PXG_CNT_BITS CntWidth
24 #define _PXG_FIFODEPTH FifoDepth
25 #define _PXG_DBG Dbg_device_not_included
27 /* ID's and Address */
28 #define _PXG_ADRRESS_ALIGN_REG 4
30 #define _PXG_COM_ENABLE_REG_IDX 0
31 #define _PXG_PRBS_RSTVAL_REG0_IDX 1
32 #define _PXG_PRBS_RSTVAL_REG1_IDX 2
33 #define _PXG_SYNG_SID_REG_IDX 3
34 #define _PXG_SYNG_FREE_RUN_REG_IDX 4
35 #define _PXG_SYNG_PAUSE_REG_IDX 5
36 #define _PXG_SYNG_NOF_FRAME_REG_IDX 6
37 #define _PXG_SYNG_NOF_PIXEL_REG_IDX 7
38 #define _PXG_SYNG_NOF_LINE_REG_IDX 8
39 #define _PXG_SYNG_HBLANK_CYC_REG_IDX 9
40 #define _PXG_SYNG_VBLANK_CYC_REG_IDX 10
41 #define _PXG_SYNG_STAT_HCNT_REG_IDX 11
42 #define _PXG_SYNG_STAT_VCNT_REG_IDX 12
43 #define _PXG_SYNG_STAT_FCNT_REG_IDX 13
44 #define _PXG_SYNG_STAT_DONE_REG_IDX 14
45 #define _PXG_TPG_MODE_REG_IDX 15
46 #define _PXG_TPG_HCNT_MASK_REG_IDX 16
47 #define _PXG_TPG_VCNT_MASK_REG_IDX 17
48 #define _PXG_TPG_XYCNT_MASK_REG_IDX 18
49 #define _PXG_TPG_HCNT_DELTA_REG_IDX 19
50 #define _PXG_TPG_VCNT_DELTA_REG_IDX 20
51 #define _PXG_TPG_R1_REG_IDX 21
52 #define _PXG_TPG_G1_REG_IDX 22
53 #define _PXG_TPG_B1_REG_IDX 23
54 #define _PXG_TPG_R2_REG_IDX 24
55 #define _PXG_TPG_G2_REG_IDX 25
56 #define _PXG_TPG_B2_REG_IDX 26
58 #define _PXG_SYNG_PAUSE_CYCLES 0
60 #define _PXG_DISABLE_IDX 0
61 #define _PXG_PRBS_IDX 0
62 #define _PXG_TPG_IDX 1
63 #define _PXG_SYNG_IDX 2
64 #define _PXG_SMUX_IDX 3
66 #define _PXG_COM_ENABLE_REG_WIDTH 2
67 #define _PXG_COM_SRST_REG_WIDTH 4
68 #define _PXG_PRBS_RSTVAL_REG0_WIDTH 31
69 #define _PXG_PRBS_RSTVAL_REG1_WIDTH 31
71 #define _PXG_SYNG_SID_REG_WIDTH 3
73 #define _PXG_SYNG_FREE_RUN_REG_WIDTH 1
74 #define _PXG_SYNG_PAUSE_REG_WIDTH 1
76 #define _PXG_SYNG_NOF_FRAME_REG_WIDTH <sync_gen_cnt_width>
77 #define _PXG_SYNG_NOF_PIXEL_REG_WIDTH <sync_gen_cnt_width>
78 #define _PXG_SYNG_NOF_LINE_REG_WIDTH <sync_gen_cnt_width>
79 #define _PXG_SYNG_HBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
80 #define _PXG_SYNG_VBLANK_CYC_REG_WIDTH <sync_gen_cnt_width>
81 #define _PXG_SYNG_STAT_HCNT_REG_WIDTH <sync_gen_cnt_width>
82 #define _PXG_SYNG_STAT_VCNT_REG_WIDTH <sync_gen_cnt_width>
83 #define _PXG_SYNG_STAT_FCNT_REG_WIDTH <sync_gen_cnt_width>
85 #define _PXG_SYNG_STAT_DONE_REG_WIDTH 1
86 #define _PXG_TPG_MODE_REG_WIDTH 2
88 #define _PXG_TPG_HCNT_MASK_REG_WIDTH <sync_gen_cnt_width>
89 #define _PXG_TPG_VCNT_MASK_REG_WIDTH <sync_gen_cnt_width>
90 #define _PXG_TPG_XYCNT_MASK_REG_WIDTH <pixle_width>
92 #define _PXG_TPG_HCNT_DELTA_REG_WIDTH 4
93 #define _PXG_TPG_VCNT_DELTA_REG_WIDTH 4
95 #define _PXG_TPG_R1_REG_WIDTH <pixle_width>
96 #define _PXG_TPG_G1_REG_WIDTH <pixle_width>
97 #define _PXG_TPG_B1_REG_WIDTH <pixle_width>
98 #define _PXG_TPG_R2_REG_WIDTH <pixle_width>
99 #define _PXG_TPG_G2_REG_WIDTH <pixle_width>
100 #define _PXG_TPG_B2_REG_WIDTH <pixle_width>
102 #define _PXG_FIFO_DEPTH 2
104 #define _PXG_ENABLE_REG_VAL 1
105 #define _PXG_PRBS_ENABLE_REG_VAL 1
106 #define _PXG_TPG_ENABLE_REG_VAL 2
107 #define _PXG_SYNG_ENABLE_REG_VAL 4
108 #define _PXG_FIFO_ENABLE_REG_VAL 8
109 #define _PXG_PXL_BITS 14
110 #define _PXG_INVALID_FLAG 0xDEADBEEF
111 #define _PXG_CAFE_FLAG 0xCAFEBABE
113 #endif /* _PixelGen_SysBlock_defs_h */