1 #ifndef __src_common_sdk_nvidia_inc_ctrl_ctrl2080_ctrl2080internal_h__
2 #define __src_common_sdk_nvidia_inc_ctrl_ctrl2080_ctrl2080internal_h__
4 /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.54.03 */
7 * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
8 * SPDX-License-Identifier: MIT
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice shall be included in
18 * all copies or substantial portions of the Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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29 #define NV2080_CTRL_CMD_INTERNAL_INTR_GET_KERNEL_TABLE (0x20800a5c) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS_MESSAGE_ID" */
31 #define NV2080_CTRL_INTERNAL_INTR_MAX_TABLE_SIZE 128
33 typedef enum NV2080_INTR_CATEGORY {
34 NV2080_INTR_CATEGORY_DEFAULT = 0,
35 NV2080_INTR_CATEGORY_ESCHED_DRIVEN_ENGINE = 1,
36 NV2080_INTR_CATEGORY_ESCHED_DRIVEN_ENGINE_NOTIFICATION = 2,
37 NV2080_INTR_CATEGORY_RUNLIST = 3,
38 NV2080_INTR_CATEGORY_RUNLIST_NOTIFICATION = 4,
39 NV2080_INTR_CATEGORY_UVM_OWNED = 5,
40 NV2080_INTR_CATEGORY_UVM_SHARED = 6,
41 NV2080_INTR_CATEGORY_ENUM_COUNT = 7,
42 } NV2080_INTR_CATEGORY;
44 typedef struct NV2080_INTR_CATEGORY_SUBTREE_MAP {
47 } NV2080_INTR_CATEGORY_SUBTREE_MAP;
49 typedef struct NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_ENTRY {
54 } NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_ENTRY;
56 typedef struct NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS {
58 NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_ENTRY table[NV2080_CTRL_INTERNAL_INTR_MAX_TABLE_SIZE];
59 NV2080_INTR_CATEGORY_SUBTREE_MAP subtreeMap[NV2080_INTR_CATEGORY_ENUM_COUNT];
60 } NV2080_CTRL_INTERNAL_INTR_GET_KERNEL_TABLE_PARAMS;
62 #define NV2080_CTRL_CMD_INTERNAL_FBSR_INIT (0x20800ac2) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS_MESSAGE_ID" */
64 typedef struct NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS {
69 NV_DECLARE_ALIGNED(NvU64 gspFbAllocsSysOffset, 8);
70 NvBool bEnteringGcoffState;
71 } NV2080_CTRL_INTERNAL_FBSR_INIT_PARAMS;
73 #define NV2080_CTRL_CMD_INTERNAL_FBSR_SEND_REGION_INFO (0x20800ac3) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_INTERNAL_INTERFACE_ID << 8) | NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS_MESSAGE_ID" */
75 typedef struct NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS {
79 NV_DECLARE_ALIGNED(NvU64 vidOffset, 8);
80 NV_DECLARE_ALIGNED(NvU64 sysOffset, 8);
81 NV_DECLARE_ALIGNED(NvU64 size, 8);
82 } NV2080_CTRL_INTERNAL_FBSR_SEND_REGION_INFO_PARAMS;