perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
authorYicong Yang <yangyicong@hisilicon.com>
Mon, 14 Aug 2023 12:40:12 +0000 (20:40 +0800)
committerWill Deacon <will@kernel.org>
Tue, 15 Aug 2023 11:50:53 +0000 (12:50 +0100)
commit0242737dc4eb9f6e9a5ea594b3f93efa0b12f28d
treed2fb73c51f6d8711c94248be23b6a581175a2abe
parent90d68677226ac7cf344648919df2016686b3e2ab
perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09

Some HiSilicon SMMU PMCG suffers the erratum 162001900 that the PMU
disable control sometimes fail to disable the counters. This will lead
to error or inaccurate data since before we enable the counters the
counter's still counting for the event used in last perf session.

This patch tries to fix this by hardening the global disable process.
Before disable the PMU, writing an invalid event type (0xffff) to
focibly stop the counters. Correspondingly restore each events on
pmu::pmu_enable().

Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20230814124012.58013-1-yangyicong@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Documentation/arch/arm64/silicon-errata.rst
drivers/acpi/arm64/iort.c
drivers/perf/arm_smmuv3_pmu.c
include/linux/acpi_iort.h