xtensa: don't use l32r opcode directly
authorMax Filippov <jcmvbkbc@gmail.com>
Wed, 5 Dec 2018 20:48:19 +0000 (12:48 -0800)
committerMax Filippov <jcmvbkbc@gmail.com>
Wed, 5 Dec 2018 20:53:07 +0000 (12:53 -0800)
commit037602705109ec2ab96340bea93ad87daa3ac046
tree616c10e2e60b8a6bfbe388366ea1c1c3f170dafb
parentf37598be4e3896359e87c824be57ddddc280cc3f
xtensa: don't use l32r opcode directly

xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
arch/xtensa/boot/boot-elf/bootstrap.S
arch/xtensa/include/asm/futex.h
arch/xtensa/include/asm/uaccess.h
arch/xtensa/kernel/head.S