clk: renesas: r9a07g044: Add USB clocks/resets
authorBiju Das <biju.das.jz@bp.renesas.com>
Wed, 30 Jun 2021 07:30:06 +0000 (08:30 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 19 Jul 2021 08:53:53 +0000 (10:53 +0200)
commit03fa6e4b2622035389a4beb9699551d63d130493
treeaf01ed1793c48dee9ca7b54c9bbef634876fffbd
parenteb829e549ba65e48b1c16ddecb892a32b366d5e4
clk: renesas: r9a07g044: Add USB clocks/resets

Add clock/reset entries for USB PHY control, USB2.0 host and device.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210630073013.22415-5-biju.das.jz@bp.renesas.com
[geert: s/usb0_device/usb0_func]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c