hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call
authorLi Zhijian <lizhijian@fujitsu.com>
Mon, 3 Feb 2025 16:19:05 +0000 (16:19 +0000)
committerMichael S. Tsirkin <mst@redhat.com>
Fri, 21 Feb 2025 12:18:42 +0000 (07:18 -0500)
commit0401c4328f4d18be540fd432c2bbacce4531d14f
tree29ee2b130085a95e80de2a95d179da945086fd6f
parent8f90a54cfafe8c93a71930a96a63ccbd074f4142
hw/mem/cxl_type3: Add paired msix_uninit_exclusive_bar() call

msix_uninit_exclusive_bar() should be paired with msix_init_exclusive_bar()

Ensure proper resource cleanup by adding the missing
`msix_uninit_exclusive_bar()` call for the Type3 CXL device.

Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20250203161908.145406-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/mem/cxl_type3.c