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RISC-V VirtIO Machine
authorMichael Clark <mjc@sifive.com>
Fri, 2 Mar 2018 12:31:13 +0000 (01:31 +1300)
committerMichael Clark <mjc@sifive.com>
Tue, 6 Mar 2018 19:30:28 +0000 (08:30 +1300)
commit04331d0b56a0cab2e40a39135a92a15266b37c36
tree20411fe7fe6cf2c5bd3f7098a67b4fb1a63fe3b9tree | snapshot
parent88a07990fa282e4b63845223e90d759ef6811264commit | diff
RISC-V VirtIO Machine

RISC-V machine with device-tree, 16550a UART and VirtIO MMIO.
The following machine is implemented:

- 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
hw/riscv/virt.c [new file with mode: 0644] blob
include/hw/riscv/virt.h [new file with mode: 0644] blob
Unnamed repository; edit this file 'description' to name the repository.