target/mips: Amend preprocessor constants for CP0 registers
authorAleksandar Markovic <amarkovic@wavecomp.com>
Tue, 15 Jan 2019 19:44:45 +0000 (20:44 +0100)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Fri, 18 Jan 2019 15:53:28 +0000 (16:53 +0100)
commit04992c8cd1c43ecdba39dd8c916db092db6ebae0
tree33895efc5312ae00ae92f5d15fa7bf5140dcd511
parent40cd718052b6c665c41852b95e723f03469f65be
target/mips: Amend preprocessor constants for CP0 registers

Correct existing CP0-related preprocessor constants (replace
"CPO" with "CP0" (form letter "O" to digit "0", when needed).
Besides, add preprocessor constants for CP0 subregisters.
The names of the subregisters were chosen to be in sync with
the table of corresponding assembler mnemonics found in the
documentation for I6500 and I6400 (release 1.0).

Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
target/mips/cpu.h
target/mips/translate.c