aspeed/smc: support different memory region ops for SMC flash region
authorJamin Lin <jamin_lin@aspeedtech.com>
Tue, 4 Jun 2024 05:44:30 +0000 (13:44 +0800)
committerCédric Le Goater <clg@redhat.com>
Sun, 16 Jun 2024 19:08:54 +0000 (21:08 +0200)
commit0559e60669bae9c047cd5cf6f9be38ea7ced39b2
tree5e509288283e6b6f46548b4cd9ac3806560aa42e
parent6330be8da44cf11e429197187e814299eff881cd
aspeed/smc: support different memory region ops for SMC flash region

It set "aspeed_smc_flash_ops" struct which containing
read and write callbacks to be used when I/O is performed
on the SMC flash region. And it set the valid max_access_size 4
by default for all ASPEED SMC models.

However, the valid max_access_size 4 only support 32 bits CPUs.
To support all ASPEED SMC model, introduce a new
"const MemoryRegionOps *" attribute in AspeedSMCClass and
use it in aspeed_smc_flash_realize function.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
hw/ssi/aspeed_smc.c
include/hw/ssi/aspeed_smc.h