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(parent: e0723c4) | patch
target-i386: fix set of registers zeroed on reset
authorPaolo Bonzini <pbonzini@redhat.com>
Tue, 29 Apr 2014 11:10:05 +0000 (13:10 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Tue, 13 May 2014 11:12:40 +0000 (13:12 +0200)
commit05e7e819d7d159a75a46354aead95e1199b8f168
tree21d3a16f818fc2b43c7333d870eff76fde1a8a07tree | snapshot
parente0723c451028102d9165e21424b4833376ce9666commit | diff
target-i386: fix set of registers zeroed on reset

BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they
should be (Intel Instruction Set Extensions Programming Reference
319433-015, pages 9-4 and 9-6).  Same for YMM.

XCR0 should be reset to 1.

TSC and TSC_RESET were zeroed already by the memset, remove the explicit
assignments.

Cc: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-i386/cpu.c diff | blob | history
target-i386/cpu.h diff | blob | history
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