riscv, bpf: Optimize bswap insns with Zbb support
authorPu Lehui <pulehui@huawei.com>
Mon, 15 Jan 2024 13:12:35 +0000 (13:12 +0000)
committerDaniel Borkmann <daniel@iogearbox.net>
Mon, 29 Jan 2024 15:25:33 +0000 (16:25 +0100)
commit06a33d024838414432b6c0f51f994e7f1695b74f
treece2470d5a3291c05e9a48eb2fd0f20334c769379
parent519fb722bea09ae2664ad21f8ef4360fb799eb2f
riscv, bpf: Optimize bswap insns with Zbb support

Optimize bswap instructions by rev8 Zbb instruction conbined with srli
instruction. And Optimize 16-bit zero-extension with Zbb support.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Tested-by: Björn Töpel <bjorn@rivosinc.com>
Acked-by: Björn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/bpf/20240115131235.2914289-7-pulehui@huaweicloud.com
arch/riscv/net/bpf_jit.h
arch/riscv/net/bpf_jit_comp64.c