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(parent: c480421) | patch
target-arm: Convert cp15 crn=6 registers
authorPeter Maydell <peter.maydell@linaro.org>
Wed, 20 Jun 2012 11:57:17 +0000 (11:57 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 20 Jun 2012 12:08:11 +0000 (12:08 +0000)
commit06d76f319f2ea1cf8a66392670a04f649d6280ce
tree49038686dbf9fb3d5e68b0d8cce79b1a9f6df66ftree | snapshot
parentc480421426c984068a27502c2948d2fa51b8cf96commit | diff
target-arm: Convert cp15 crn=6 registers

Convert the cp15 crn=6 registers to the new scheme.
Note that this includes some minor tidyup: drop an unnecessary
underdecoding of op2 on OMAPCP cores, and only implement the
pre-v6 c6,c0,0,1 IFAR on the 1026 and not on the other ARMv5
cores, which didn't have it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target-arm/cpu.c diff | blob | history
target-arm/helper.c diff | blob | history
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