target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented
authorJerome Forissier <jerome.forissier@linaro.org>
Tue, 4 Oct 2022 07:23:54 +0000 (09:23 +0200)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 10 Oct 2022 13:52:23 +0000 (14:52 +0100)
commit06f2adccfa26be55237ac966c376a42c52efb299
treec4bc2f969cdd3058c5b6fae0d4b1296f182ea7e7
parentbbde13cd14ad4eec18529ce0bf5876058464e124
target/arm: allow setting SCR_EL3.EnTP2 when FEAT_SME is implemented

Updates write_scr() to allow setting SCR_EL3.EnTP2 when FEAT_SME is
implemented. SCR_EL3 being a 64-bit register, valid_mask is changed
to uint64_t and the SCR_* constants in target/arm/cpu.h are extended
to 64-bit so that masking and bitwise not (~) behave as expected.

This enables booting Linux with Trusted Firmware-A at EL3 with
"-M virt,secure=on -cpu max".

Cc: qemu-stable@nongnu.org
Fixes: 78cb9776662a ("target/arm: Enable SME for -cpu max")
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20221004072354.27037-1-jerome.forissier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/helper.c