target: riscv: Enable Bit Manip for OpenTitan Ibex CPU
authorAlistair Francis <alistair23@gmail.com>
Fri, 23 Aug 2024 00:32:31 +0000 (10:32 +1000)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 2 Oct 2024 05:11:51 +0000 (15:11 +1000)
commit06fb3bda6aadeb190be09a1513f1f0d31d119d16
treea086e04cc893a9c6731c66b664458b3f8c7a36fc
parentd1f872e15f9b489f121ab8570270c771175254ec
target: riscv: Enable Bit Manip for OpenTitan Ibex CPU

The OpenTitan Ibex CPU now supports the the Zba, Zbb, Zbc
and Zbs bit-manipulation sub-extensions ratified in
v.1.0.0 of the RISC-V Bit- Manipulation ISA Extension, so let's enable
them in QEMU as well.

1: https://github.com/lowRISC/opentitan/pull/9748

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240823003231.3522113-1-alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c