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(parent: 8de0f28) | patch
hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Fri, 4 Dec 2020 22:16:45 +0000 (23:16 +0100)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Sun, 13 Dec 2020 19:26:02 +0000 (20:26 +0100)
commit07741e67542d061b45628a5de60637b006ca2de5
treebd41aa3ae517b298e95b7046fd4379939986e372tree | snapshot
parent8de0f2804676decfa82ce51ef18293523e67af32commit | diff
hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit()

PTC field has 8 bits, PVPE has 4. We plan to use the
"hw/registerfields.h" API with MIPS CPU definitions
(target/mips/cpu.h). Meanwhile we use magic 8 and 4.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201204222622.2743175-6-f4bug@amsat.org>
hw/mips/malta.c diff | blob | history
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