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(parent: a452816) | patch
dt-bindings: riscv: permit numbers in "riscv,isa"
authorConor Dooley <conor.dooley@microchip.com>
Fri, 8 Dec 2023 16:06:51 +0000 (16:06 +0000)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Jan 2024 15:36:29 +0000 (07:36 -0800)
commit07df87c0f8815898cb994408c4b6dd542a1394b8
treeef5baf3fe879f9916e78673658daed490250de4ftree | snapshot
parenta452816132d699bbb2af6fab8530685306054bdacommit | diff
dt-bindings: riscv: permit numbers in "riscv,isa"

There are some extensions that contain numbers, such as Zve32f, which
are enabled by the "max" cpu type in QEMU.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231208-uncolored-oxidant-5ab37dd3ab84@spud
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/extensions.yaml diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git