ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs
authorVladimir Oltean <olteanv@gmail.com>
Thu, 14 Nov 2019 11:02:53 +0000 (12:02 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 9 Dec 2019 00:28:07 +0000 (08:28 +0800)
commit0840a47ee85fdcc883b535ba12a849bfc2078523
tree4465929d4e8a8b243523f8ec178cb18ee13ddcfa
parentd27f9d634c9b8b375e8fd949da615e29283dcd44
ARM: dts: ls1021a-tsn: Use interrupts for the SGMII PHYs

On the LS1021A-TSN board, the 2 Atheros AR8031 PHYs for eth0 and eth1
have interrupt lines connected to the shared IRQ2_B LS1021A pin.

Switching to interrupts offloads the PHY library from the task of
polling the MDIO status and AN registers (1, 4, 5) every second.

Unfortunately, the BCM5464R quad PHY connected to the switch does not
appear to have an interrupt line routed to the SoC.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/ls1021a-tsn.dts