riscv: dts: add resets property for uart node
authorChen Wang <unicorn_wang@outlook.com>
Tue, 30 Jan 2024 01:50:51 +0000 (09:50 +0800)
committerInochi Amaoto <inochiama@outlook.com>
Fri, 23 Feb 2024 04:38:03 +0000 (12:38 +0800)
commit08573ba006ab7bc29c183e0b3c362a0b34f1d87b
tree96f207606b7d237d429549ee4373f2e5224379c8
parent1ce7587e507e1762df1dadc22affcd41376040d5
riscv: dts: add resets property for uart node

Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
arch/riscv/boot/dts/sophgo/sg2042.dtsi