clk: renesas: r8a779g0: Fix PCIe clock name
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 30 Jan 2024 09:47:49 +0000 (10:47 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 31 Jan 2024 10:19:24 +0000 (11:19 +0100)
commit096311157d2a6bb8f06e28e1143e2a5de6a0183b
treedd64bfa951a9d451926c2363bb3a233b1cc450b8
parentf077cab34df3010df6f4996e648dba5f43fd6b85
clk: renesas: r8a779g0: Fix PCIe clock name

Fix a typo in the name of the module clock for the second PCIe channel.

Fixes: 5ab16198b431ca48 ("clk: renesas: r8a779g0: Add PCIe clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f582067564f357e2183d3db67b217084ecb51888.1706608032.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779g0-cpg-mssr.c