target/riscv: Set disassemble_info::endian value in disas_set_info()
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Sun, 26 Jan 2025 13:31:44 +0000 (14:31 +0100)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Thu, 6 Mar 2025 14:46:18 +0000 (15:46 +0100)
commit0a8bfcbe7ca32f160c47faa9d611173b0697a698
treeae83fd2eb3253ea485863ff1a37c33ad66cfc2c4
parent724bac41906752aafd432714d13fc78da2265f1c
target/riscv: Set disassemble_info::endian value in disas_set_info()

Have the CPUClass::disas_set_info() callback set the
disassemble_info::endian field.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250210212931.62401-8-philmd@linaro.org>
target/riscv/cpu.c