drm/amd/display: Correct dram channel width for dcn314
authorDuncan Ma <duncan.ma@amd.com>
Wed, 24 Aug 2022 18:35:03 +0000 (14:35 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Sep 2022 18:27:00 +0000 (14:27 -0400)
commit0b15b1ec8b74bd5c9a4e4cbadab82c0657832799
treeff5f0212a7dcca99195a66804d5828242c3e0b96
parent82c4018479fba63db8db7c7fbfd9e4afba95603a
drm/amd/display: Correct dram channel width for dcn314

[Why]
The interpretation of the number of memory channels
differ by memory type, and this affects channel width
for the DML input.

[How]
Set dram channel width according to memory type for
dcn314.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h