RISC-V: alternatives: Support patching multiple insns in assembly
authorAndrew Jones <ajones@ventanamicro.com>
Fri, 24 Feb 2023 16:26:24 +0000 (17:26 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 15 Mar 2023 04:26:01 +0000 (21:26 -0700)
commit0b2f658f5370d9818244682c76fd8f6a91b2b1af
tree97ff37c4c87a75daf3161eef26973fb8a9676f4e
parent816a69744102bc886edc3557d00e840e3e35e7d5
RISC-V: alternatives: Support patching multiple insns in assembly

As pointed out in commit d374a16539b1 ("RISC-V: fix compile error
from deduplicated __ALTERNATIVE_CFG_2"), we need quotes around
parameters passed to macros within macros to avoid spaces being
interpreted as separators. ALT_NEW_CONTENT was trying to handle
this by defining new_c has a vararg, but this isn't sufficient
for calling ALTERNATIVE() from assembly with multiple instructions
in the new/old sequences. Remove the vararg "hack" and use quotes.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230224162631.405473-2-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/alternative-macros.h