mtd: spinand: micron: identify SPI NAND device with Continuous Read mode
authorShivamurthy Shastri <sshivamurthy@micron.com>
Wed, 11 Mar 2020 17:57:33 +0000 (18:57 +0100)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Thu, 12 Mar 2020 12:33:32 +0000 (13:33 +0100)
commit0bc68af9137dc3f30b161de4ce546c7799f88d1e
treedd46cd06e90b99c0451172d20aa509846e4d6a43
parenta15335a17f4abf48ed9739c3b119232f9392cb60
mtd: spinand: micron: identify SPI NAND device with Continuous Read mode

Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
the Continuous Read mode.

Some of the Micron SPI NAND devices have the "Continuous Read" feature
enabled by default, which does not fit the subsystem needs.

In this mode, the READ CACHE command doesn't require the starting column
address. The device always output the data starting from the first
column of the cache register, and once the end of the cache register
reached, the data output continues through the next page. With the
continuous read mode, it is possible to read out the entire block using
a single READ command, and once the end of the block reached, the output
pins become High-Z state. However, during this mode the read command
doesn't output the OOB area.

Hence, we disable the feature at probe time.

Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-5-sshivamurthy@micron.com
drivers/mtd/nand/spi/micron.c
include/linux/mtd/spinand.h