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microblaze: Fix cache loop function for cache range
authorMichal Simek <monstr@monstr.eu>
Mon, 15 Feb 2010 09:50:42 +0000 (10:50 +0100)
committerMichal Simek <monstr@monstr.eu>
Wed, 24 Feb 2010 12:18:29 +0000 (13:18 +0100)
commit0d670b24729be268eba98b3920b8571f60798d8d
tree10f35ab6ea332bb2f082c5ffaed60e6442d36508tree | snapshot
parent75ef7cdda2daa35be9e070ac8e5258759ac03d06commit | diff
microblaze: Fix cache loop function for cache range

I create wrong asm code but none test shows that this part of code is wrong.
I am not convinces that were good idea to create asm optimized macros
for caches. The reason is that there is not optimization with previous code
that's why make sense to add old code and do some benchmarking which
functions are faster.

Signed-off-by: Michal Simek <monstr@monstr.eu>
arch/microblaze/kernel/cpu/cache.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git