drm/amd/display: Add new sequence for 4-lane HBR3 on vendor specific retimers
authorOvidiu Bunea <ovidiu.bunea@amd.com>
Fri, 14 Jul 2023 16:00:16 +0000 (12:00 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jul 2023 17:40:54 +0000 (13:40 -0400)
commit0d882e43504cf3ac28a0852e1c1cd71155a6919b
treeea34cea513f9aa55f3210f4775be1b779868748a
parentad4455c614b27e6b24a4e6bd70114545c1660ff9
drm/amd/display: Add new sequence for 4-lane HBR3 on vendor specific retimers

[Why]
In some vendor specific retimer setups for downstream 4-lane HBR3
configuration, the sink will show severe corruption (horizontal shifting)
and intermittent blanking.

[How]
Add new retimer programming sequence before clock recovery when 4 lanes
are active.

Reviewed-by: Michael Strauss <michael.strauss@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c