numa: Enable numa for SGX EPC sections
authorYang Zhong <yang.zhong@intel.com>
Mon, 1 Nov 2021 16:20:05 +0000 (12:20 -0400)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 10 Dec 2021 08:47:18 +0000 (09:47 +0100)
commit1105812382e1126d86dddc16b3700f8c79dc93d1
treec7f4044ce053a6a923d8630981452b895277cfea
parentfd2ddd168935690056a42b0ffe8f2480d8537751
numa: Enable numa for SGX EPC sections

The basic SGX did not enable numa for SGX EPC sections, which
result in all EPC sections located in numa node 0. This patch
enable SGX numa function in the guest and the EPC section can
work with RAM as one numa node.

The Guest kernel related log:
[    0.009981] ACPI: SRAT: Node 0 PXM 0 [mem 0x180000000-0x183ffffff]
[    0.009982] ACPI: SRAT: Node 1 PXM 1 [mem 0x184000000-0x185bfffff]
The SRAT table can normally show SGX EPC sections menory info in different
numa nodes.

The SGX EPC numa related command:
 ......
 -m 4G,maxmem=20G \
 -smp sockets=2,cores=2 \
 -cpu host,+sgx-provisionkey \
 -object memory-backend-ram,size=2G,host-nodes=0,policy=bind,id=node0 \
 -object memory-backend-epc,id=mem0,size=64M,prealloc=on,host-nodes=0,policy=bind \
 -numa node,nodeid=0,cpus=0-1,memdev=node0 \
 -object memory-backend-ram,size=2G,host-nodes=1,policy=bind,id=node1 \
 -object memory-backend-epc,id=mem1,size=28M,prealloc=on,host-nodes=1,policy=bind \
 -numa node,nodeid=1,cpus=2-3,memdev=node1 \
 -M sgx-epc.0.memdev=mem0,sgx-epc.0.node=0,sgx-epc.1.memdev=mem1,sgx-epc.1.node=1 \
 ......

Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20211101162009.62161-2-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
hw/core/numa.c
hw/i386/acpi-build.c
hw/i386/sgx-epc.c
hw/i386/sgx-stub.c
hw/i386/sgx.c
include/hw/i386/sgx-epc.h
monitor/hmp-cmds.c
qapi/machine.json
qemu-options.hx