target/ppc: Move sync instructions to decodetree
authorNicholas Piggin <npiggin@gmail.com>
Wed, 1 May 2024 13:04:32 +0000 (23:04 +1000)
committerNicholas Piggin <npiggin@gmail.com>
Thu, 23 May 2024 22:57:50 +0000 (08:57 +1000)
commit13f50867837874892f33c32a4452843d9ce7144c
tree08eb08b91ab009f0da433b0dae2b74d9ed025e02
parent30933c4fb4f3df95ae44c4c3c86a5df049852c01
target/ppc: Move sync instructions to decodetree

This tries to faithfully reproduce the odd BookE logic. Note the
e206 check in gen_msync_4xx() is always false, so not carried over.

It does change the handling of non-zero reserved bits outside the
defined fields from being illegal to being ignored, which the
architecture specifies ot help with backward compatibility of new
fields. The existing behaviour causes illegal instruction exceptions
when using new POWER10 sync variants that add new fields, after this
the instructions are accepted and are implemented as supersets of
the new behaviour, as intended.

Reviewed-by: Chinmay Rath <rathc@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
target/ppc/insn32.decode
target/ppc/translate.c
target/ppc/translate/misc-impl.c.inc [new file with mode: 0644]