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(parent: 28081b7) | patch
phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks
authorKishon Vijay Abraham I <kishon@ti.com>
Fri, 19 Mar 2021 12:41:28 +0000 (18:11 +0530)
committerVinod Koul <vkoul@kernel.org>
Wed, 31 Mar 2021 11:13:21 +0000 (16:43 +0530)
commit1436ec309e6251b372b757bfacf88f5954b8f3fd
treec2ff0c57294a816fd0c801f41d448a43b1fbdbc6tree | snapshot
parent28081b72859f0fa3d5b56cfd84b2f5ba578765d2commit | diff
phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks

Get pll_cmnlc and pll_cmnlc1 optional clocks and enable them.
This will enable REFRCV/1 in case the pll_cmnlc/1 takes input
from REFRCV/1 respectively.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com>
Link: https://lore.kernel.org/r/20210319124128.13308-14-kishon@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/cadence/phy-cadence-sierra.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git