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target/riscv: Restrict 'rv128' machine to TCG accelerator
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Mon, 26 Jun 2023 20:36:10 +0000 (22:36 +0200)
committerPhilippe Mathieu-Daudé <philmd@linaro.org>
Tue, 4 Jun 2024 08:02:39 +0000 (10:02 +0200)
commit14482b1360c34e1ccd3b9a6135aeff17ee3c8ee1
tree59742acf2c57ad9bfa79d42a17f2aa1afb5f347ftree | snapshot
parent7106121d26229f36ac0fb33e35bcb50513447582commit | diff
target/riscv: Restrict 'rv128' machine to TCG accelerator

We only build for 32/64-bit hosts, so TCG is required for
128-bit targets.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230626232007.8933-5-philmd@linaro.org>
target/riscv/cpu.c diff | blob | history
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