phy: qcom-qmp: Correct ready status, again
authorBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 6 Aug 2019 00:42:56 +0000 (17:42 -0700)
committerKishon Vijay Abraham I <kishon@ti.com>
Mon, 26 Aug 2019 11:50:04 +0000 (17:20 +0530)
commit14ced7e3a1ae9bed7051df3718c8c7b583854a5c
treea08480ed8bc2eae0916a311002ff22c9efbe3ec4
parentbe0345b2cc1f3e6044409b274c61bc44d59f640d
phy: qcom-qmp: Correct ready status, again

Despite extensive testing of commit 885bd765963b ("phy: qcom-qmp: Correct
READY_STATUS poll break condition") I failed to conclude that the
PHYSTATUS bit of the PCS_STATUS register used in PCIe and USB3 falls as
the PHY gets ready. Similar to the prior bug with UFS the code will
generally get past the check before the transition and thereby
"succeed".

Correct the name of the register used PCIe and USB3 PHYs, replace
mask_pcs_ready with a constant expression depending on the type of the
PHY and check for the appropriate ready state.

Cc: stable@vger.kernel.org
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Cc: Evan Green <evgreen@chromium.org>
Cc: Niklas Cassel <niklas.cassel@linaro.org>
Reported-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Fixes: 885bd765963b ("phy: qcom-qmp: Correct READY_STATUS poll break condition")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/qualcomm/phy-qcom-qmp.c