x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs
authorXiaochun Lee <lixc17@lenovo.com>
Fri, 15 May 2020 03:31:07 +0000 (23:31 -0400)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 15 May 2020 19:19:50 +0000 (14:19 -0500)
commit1574051e52cb4b5b7f7509cfd729b76ca1117808
tree76fd99036d84d03e6b4147cac3b5680023238cee
parent6ae72bfa656ea04806f98ef85cb44b0789064362
x86/PCI: Mark Intel C620 MROMs as having non-compliant BARs

The Intel C620 Platform Controller Hub has MROM functions that have non-PCI
registers (undocumented in the public spec) where BAR 0 is supposed to be,
which results in messages like this:

  pci 0000:00:11.0: [Firmware Bug]: reg 0x30: invalid BAR (can't size)

Mark these MROM functions as having non-compliant BARs so we don't try to
probe any of them.  There are no other BARs on these devices.

See the Intel C620 Series Chipset Platform Controller Hub Datasheet,
May 2019, Document Number 336067-007US, sec 2.1, 35.5, 35.6.

[bhelgaas: commit log, add 0xa26d]
Link: https://lore.kernel.org/r/1589513467-17070-1-git-send-email-lixiaochun.2888@163.com
Signed-off-by: Xiaochun Lee <lixc17@lenovo.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
arch/x86/pci/fixup.c