target/riscv: zvbb implies zvkb
authorJerry Zhang Jian <jerry.zhangjian@sifive.com>
Tue, 28 May 2024 13:03:49 +0000 (21:03 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 26 Jun 2024 12:30:52 +0000 (22:30 +1000)
commit15b8ddb18ae0be3f3921cab7169fa562b77227e0
tree60d78e46a354770156f6e65fb591ac929d743fa5
parent92c82a126e633c51ac01b6fc158123aca96dddf6
target/riscv: zvbb implies zvkb

According to RISC-V crypto spec, Zvkb extension is a
subset of the Zvbb extension [1].

1: https://github.com/riscv/riscv-crypto/blob/1769c2609bf4535632e0c0fd715778f212bb272e/doc/vector/riscv-crypto-vector-zvkb.adoc?plain=1#L10

Signed-off-by: Jerry Zhang Jian <jerry.zhangjian@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240528130349.20193-1-jerry.zhangjian@sifive.com>
[ Changes by AF:
 - Tidy up commit message
 - Rebase
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/tcg/tcg-cpu.c