RISC-V: Use IPIs for remote TLB flush when possible
authorAnup Patel <apatel@ventanamicro.com>
Tue, 28 Mar 2023 03:52:21 +0000 (09:22 +0530)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 10:26:24 +0000 (11:26 +0100)
commit18d2199d81054f44e6d2a51177cc80566f43bf23
tree89e22a14d8ec806ae5e7818e436699193338e1df
parentfb0f3d281b7f81a11e210783940f3798c4744179
RISC-V: Use IPIs for remote TLB flush when possible

If we have specialized interrupt controller (such as AIA IMSIC) which
allows supervisor mode to directly inject IPIs without any assistance
from M-mode or HS-mode then using such specialized interrupt controller,
we can do remote TLB flushes directly from supervisor mode instead of
using the SBI RFENCE calls.

This patch extends remote TLB flush functions to use supervisor mode
IPIs whenever direct supervisor mode IPIs.are supported by interrupt
controller.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230328035223.1480939-6-apatel@ventanamicro.com
arch/riscv/mm/tlbflush.c