drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)
authorImre Deak <imre.deak@intel.com>
Mon, 29 Jan 2024 17:55:29 +0000 (19:55 +0200)
committerImre Deak <imre.deak@intel.com>
Wed, 10 Apr 2024 16:12:56 +0000 (19:12 +0300)
commit1af52d0555b9ffcbce8bdc9d28a9e81c81a53274
tree5a73db7fc6d886e318f96cd8554c309eb0b0ef45
parent9655a9a7fb48ad1fc1f6c907a94c3609e2b78267
drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)

Add a workaround to fix BS jitter issues on MST links if the HBLANK
period is less than 1 MTP. The WA applies only to UHBR rates while on
non-UHBR the specification requires disabling it explicitly - presumedly
because the register's reset value has the WA enabled.

Bspec: 50050, 55424

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-3-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp_mst.c
drivers/gpu/drm/i915/i915_reg.h