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drm/xe: Always write GEN12_RCU_MODE.GEN12_RCU_MODE_CCS_ENABLE for CCS engines
authorMatthew Brost <matthew.brost@intel.com>
Wed, 5 Apr 2023 23:20:03 +0000 (16:20 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:31:38 +0000 (18:31 -0500)
commit1c060057ec29e0305aa314c19a80090c21524faa
treed80a1360b6767ad46c9db7e7872740ce7eedda76tree | snapshot
parentad55ead7f3c7b041dbf058a9c4b954be5929bb5ecommit | diff
drm/xe: Always write GEN12_RCU_MODE.GEN12_RCU_MODE_CCS_ENABLE for CCS engines

If CCS0 was fused we did not write this register thus CCS engine were
not enabled resulting in driver load failures.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_hw_engine.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git