spi: xilinx: add force_irq for QSPI mode
authorVadim Fedorenko <vadfed@meta.com>
Tue, 14 Feb 2023 13:59:28 +0000 (05:59 -0800)
committerMark Brown <broonie@kernel.org>
Tue, 14 Feb 2023 18:04:59 +0000 (18:04 +0000)
commit1dd46599f83ac5323a175d32955b1270e95cd11b
tree767681de811eddf0af2758b87b75024a3e16b0ed
parente97622254420ce5f03f3f3e6ad6ecbf86da248d9
spi: xilinx: add force_irq for QSPI mode

Xilinx PG158 page 80 [1] states that master transaction inhibit bit must
be set to properly setup the transaction in QSPI mode. Add the force_irq
flag to follow this sequence.

[1] https://docs.xilinx.com/r/en-US/pg153-axi-quad-spi/Dual/Quad-SPI-Mode-Transactions

Signed-off-by: Vadim Fedorenko <vadfed@meta.com>
Link: https://lore.kernel.org/r/20230214135928.1253205-1-vadfed@meta.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-xilinx.c
include/linux/spi/xilinx_spi.h