media: intel/ipu6: add the CSI2 DPHY implementation
authorBingbu Cao <bingbu.cao@intel.com>
Wed, 31 Jan 2024 09:51:01 +0000 (17:51 +0800)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Mon, 29 Apr 2024 12:56:38 +0000 (14:56 +0200)
commit1e7eeb301696c3959fbf95052a03516723f7fd0a
tree5c1c07785cc3183807ad7fe6d5dba5d16d4d91db
parenta11a5570a09dbcbe3b8813bd9fb7e9c630afdbf4
media: intel/ipu6: add the CSI2 DPHY implementation

IPU6 CSI-2 D-PHY hardware varies on different platforms, current IPU6 has
three D-PHY hardware instances which are used on Tigerlake, Alder lake,
Meteor lake and Jasper lake. MCD D-PHY is included in Tigerlake and Alder
lake, DWC D-PHY is included in Meteor lake.

Each PHY has its own register interface, the input system driver calls the
appropriate D-PHY callbacks for the hardware set in isys_probe().

Signed-off-by: Bingbu Cao <bingbu.cao@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/media/pci/intel/ipu6/ipu6-isys-dwc-phy.c [new file with mode: 0644]
drivers/media/pci/intel/ipu6/ipu6-isys-jsl-phy.c [new file with mode: 0644]
drivers/media/pci/intel/ipu6/ipu6-isys-mcd-phy.c [new file with mode: 0644]