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clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Tue, 25 Jul 2023 08:51:56 +0000 (10:51 +0200)
committerBjorn Andersson <andersson@kernel.org>
Fri, 28 Jul 2023 03:28:15 +0000 (20:28 -0700)
commit20e1d75bc043c5ec1fd8f5169fde17db89eb11c3
tree42005123387dda499ba04c8b60e542475461ffe4tree | snapshot
parenta9f71a033587c9074059132d34c74eabbe95ef26commit | diff
clk: qcom: dispcc-sc8280xp: Use ret registers on GDSCs

The DISP_CC GDSCs have not been instructed to use the ret registers.
Fix that.

Fixes: 4a66e76fdb6d ("clk: qcom: Add SC8280XP display clock controller")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230725-topic-8280_dispcc_gdsc-v1-1-236590060531@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/dispcc-sc8280xp.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git