target/riscv: Start counters from both mhpmcounter and mcountinhibit
authorRajnesh Kanwal <rkanwal@rivosinc.com>
Thu, 11 Jul 2024 22:31:13 +0000 (15:31 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 18 Jul 2024 02:08:45 +0000 (12:08 +1000)
commit22c721c34c1609b5ac53dfc0d34125ec479205a0
tree312cb9996be3a691a42716a32868ac9c6ba92018
parent8cff74c26dbdfc746d8f0165c233be3d396d4572
target/riscv: Start counters from both mhpmcounter and mcountinhibit

Currently we start timer counter from write_mhpmcounter path only
without checking for mcountinhibit bit. This changes adds mcountinhibit
check and also programs the counter from write_mcountinhibit as well.

When a counter is stopped using mcountinhibit we simply update
the value of the counter based on current host ticks and save
it for future reads.

We don't need to disable running timer as pmu_timer_trigger_irq
will discard the interrupt if the counter has been inhibited.

Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240711-smcntrpmf_v7-v8-10-b7c38ae7b263@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/csr.c
target/riscv/pmu.c