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hw/arm/armsse: Add unimplemented-device stub for cache control registers
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 1 Feb 2019 14:55:43 +0000 (14:55 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 1 Feb 2019 14:55:43 +0000 (14:55 +0000)
commit2357bca5328e9f6b1e0f14a3ac62a7f8b1aef557
treedbe5f92de22624f50849b84d5b78cdd0043e80b3tree | snapshot
parente0b00f1b92d700171cfe39fac39de9fa75c1aecdcommit | diff
hw/arm/armsse: Add unimplemented-device stub for cache control registers

The SSE-200 gives each CPU a register bank to use to control its
L1 instruction cache. Put in an unimplemented-device stub for this.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190121185118.18550-18-peter.maydell@linaro.org
hw/arm/armsse.c diff | blob | history
include/hw/arm/armsse.h diff | blob | history
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