iio: adc: ti-adc128s052: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:12 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:14 +0000 (11:53 +0100)
commit23c81e7a7e5204a08b553d07362d3082926663b8
tree38f052b9982b12027160a13f2268ca5f07952f0a
parent76890c3bce6003caf53b283c49a210280cb8ea33
iio: adc: ti-adc128s052: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 913b86468674 ("iio: adc: Add TI ADC128S052")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org
drivers/iio/adc/ti-adc128s052.c