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ARM: dts: aspeed: Add coprocessor interrupt controller
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Tue, 24 Jul 2018 04:24:02 +0000 (14:24 +1000)
committerJoel Stanley <joel@jms.id.au>
Wed, 25 Jul 2018 08:08:03 +0000 (17:38 +0930)
commit2450ceaf21798183f51bfdbd7d314635dbb62f4c
tree568f4fb920bd56a9977b419b6b8d6192f0b29c12tree | snapshot
parenta2df75ab0aba98daf7fa4828cf8a669c636c6382commit | diff
ARM: dts: aspeed: Add coprocessor interrupt controller

Add a node for the CVIC (the coprocessor interrupt controller) and
add a label to the SRAM node so it can be referenced from the board
device-tree file.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
arch/arm/boot/dts/aspeed-g4.dtsi diff | blob | history
arch/arm/boot/dts/aspeed-g5.dtsi diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git