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(parent: fa7c0c9) | patch
target/mips: Add nanoMIPS base instruction set opcodes
authorYongbok Kim <yongbok.kim@mips.com>
Thu, 2 Aug 2018 14:16:02 +0000 (16:16 +0200)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Fri, 24 Aug 2018 15:51:59 +0000 (17:51 +0200)
commit261c95a0e98e5e9b13c9c005a991b7e7dc27f38a
treec95ba0033ff431f81a6567be4ff18df16399b588tree | snapshot
parentfa7c0c9f5bc12970858a89f46dd5012c01545b80commit | diff
target/mips: Add nanoMIPS base instruction set opcodes

Add nanoMIPS opcodes. nanoMIPS instruction are organized by so-called
instruction pools. Each pool contains a set of opcodes, that in turn
can be instruction opcodes or instruction pool opcodes.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
target/mips/translate.c diff | blob | history
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