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author	Ville Syrjälä <ville.syrjala@linux.intel.com>
	Tue, 28 Nov 2023 11:51:35 +0000 (13:51 +0200)
committer	Ville Syrjälä <ville.syrjala@linux.intel.com>
	Wed, 13 Dec 2023 18:50:09 +0000 (20:50 +0200)
commit	273361f54e5bcaccdd725a9ffac14a9fac672451
tree	73de96bb4956f14429045d14e3d8bb48baa9ea29	tree \| snapshot
parent	f23fe4d7d794c6d71dc6b8fdc510da2fc2174369	commit \| diff

drm/i915/mtl: Fix voltage_level for cdclk==480MHz

Allow MTL to use voltage level 1 for 480MHz cdclk,
instead of the voltage level 2 that it's currently using.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231128115138.13238-6-ville.syrjala@linux.intel.com
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

drivers/gpu/drm/i915/display/intel_cdclk.c

diff | blob | history

ep93xx device tree rework repo: git://git.maquefel.me/linux.git

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