drm/vc4: crtc: Fix timings for VEC modes
authorMateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Wed, 7 Dec 2022 11:53:24 +0000 (12:53 +0100)
committerMaxime Ripard <maxime@cerno.tech>
Mon, 9 Jan 2023 14:21:31 +0000 (15:21 +0100)
commit273c417658c83026741ded0c34cec9caab41e97f
treebc8f868f71ab36784e4b7f3454178c1e89d7c361
parent6c37c9c65d2c792ddee3e33e595a498592bf9735
drm/vc4: crtc: Fix timings for VEC modes

This commit fixes vertical timings of the VEC (composite output) modes
to accurately represent the 525-line ("NTSC") and 625-line ("PAL") ITU-R
standards.

Previous timings were actually defined as 502 and 601 lines, resulting
in non-standard 62.69 Hz and 52 Hz signals being generated,
respectively.

Changes to vc4_crtc.c have also been made, to make the PixelValve
vertical timings accurately correspond to the DRM modeline in interlaced
modes. The resulting VERTA/VERTB register values have been verified
against the reference values set by the Raspberry Pi firmware.

Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-13-1f8e0770798b@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
drivers/gpu/drm/vc4/vc4_crtc.c