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m68knommu: merge bit definitions for version 3 ColdFire cache controller
authorGreg Ungerer <gerg@uclinux.org>
Tue, 9 Nov 2010 00:19:45 +0000 (10:19 +1000)
committerGreg Ungerer <gerg@uclinux.org>
Wed, 5 Jan 2011 05:19:18 +0000 (15:19 +1000)
commit278c2cbd59371bc8905d83b7cc3aa0bbe69c00f1
tree56df7c83d37bf188a7750f3b126b6dd24b3db918tree | snapshot
parenta12cf0a8c6e2763ac865aa31f296557e07432b8acommit | diff
m68knommu: merge bit definitions for version 3 ColdFire cache controller

All version 3 based ColdFire CPU cores have a similar cache controller.
Merge all the exitsing definitions into a single file, and make them
similar in style and naming to the existing version 2 and version 4
cache controller definitions.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
arch/m68k/include/asm/m5307sim.h diff | blob | history
arch/m68k/include/asm/m532xsim.h diff | blob | history
arch/m68k/include/asm/m53xxacr.h [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git