hw/arm/exynos4210: Specify explicitly the GIC has 64 external IRQs
authorPhilippe Mathieu-Daudé <philmd@linaro.org>
Wed, 12 Feb 2025 15:43:27 +0000 (16:43 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 20 Feb 2025 14:20:29 +0000 (14:20 +0000)
commit284e354566c31687cce260401549a616cf513c60
tree5f0c82e2c9132470b2d9014a184056fb04d2726b
parent4ac4d6e77613ccbb9aa55675429dc0b9ae1f8ea6
hw/arm/exynos4210: Specify explicitly the GIC has 64 external IRQs

When not specified, Cortex-A9MP configures its GIC with 64 external
IRQs (see commit a32134aad89 "arm:make the number of GIC interrupts
configurable"). Add the GIC_EXT_IRQS definition (with a comment)
to make that explicit.

Except explicitly setting a property value to its same implicit
value, there is no logical change intended.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250212154333.28644-3-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/exynos4210.c