perf/x86/intel/pt: Add a capability and config bit for event tracing
authorAlexander Shishkin <alexander.shishkin@linux.intel.com>
Wed, 26 Jan 2022 10:48:14 +0000 (12:48 +0200)
committerPeter Zijlstra <peterz@infradead.org>
Tue, 15 Feb 2022 16:47:11 +0000 (17:47 +0100)
commit28c24ded649cf068ca518f2a3d78f5e7e06d41d8
tree37ce5f41eb37a886d4ab1257e4afa2c06e54bd4a
parentee28855a54493ce83bc2a3fbe30210be61b57bc7
perf/x86/intel/pt: Add a capability and config bit for event tracing

As of Intel SDM (https://www.intel.com/sdm) version 076, there is a new
Intel PT feature called Event Trace which is enabled config bit 31.

Event Trace exposes details about asynchronous events such as interrupts
and VM-Entry/Exit.

Add a capability and config bit for Event Trace.

Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220126104815.2807416-2-adrian.hunter@intel.com
arch/x86/events/intel/pt.c
arch/x86/include/asm/intel_pt.h
arch/x86/include/asm/msr-index.h