soc/tegra: cbb: Check firewall before enabling error reporting
authorSumit Gupta <sumitg@nvidia.com>
Wed, 9 Nov 2022 13:57:17 +0000 (19:27 +0530)
committerThierry Reding <treding@nvidia.com>
Fri, 11 Nov 2022 14:39:45 +0000 (15:39 +0100)
commit2927cf85f4877f417f884919de8e04ab9b362d32
tree59bb26a5e82fc06390da9110c268d31212888c26
parent55084947d6b48977c5122fbe443743a6c50c12bf
soc/tegra: cbb: Check firewall before enabling error reporting

To enable error reporting for a fabric to CCPLEX, we need to write its
register for enabling error interrupt to CCPLEX during boot and later
clear the error status register after error occurs. If a fabric's
registers are protected and not accessible from CCPLEX, then accessing
the registers will cause CBB firewall error.

Add support to check whether write access from CCPLEX to the registers
of a fabric is not blocked by it's firewall before enabling error
reporting to CCPLEX for that fabric.

Fixes: fc2f151d2314 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/soc/tegra/cbb/tegra234-cbb.c