perf/x86/amd/lbr: Discard erroneous branch entries
authorSandipan Das <sandipan.das@amd.com>
Mon, 29 Jan 2024 11:06:25 +0000 (16:36 +0530)
committerIngo Molnar <mingo@kernel.org>
Wed, 13 Mar 2024 10:01:30 +0000 (11:01 +0100)
commit29297ffffb0bf388778bd4b581a43cee6929ae65
tree23c10274b6ea6633d8da124dbf5cf814ba427666
parentb29f377119f68b942369a9366bdcb1fec82b2cda
perf/x86/amd/lbr: Discard erroneous branch entries

The Revision Guide for AMD Family 19h Model 10-1Fh processors declares
Erratum 1452 which states that non-branch entries may erroneously be
recorded in the Last Branch Record (LBR) stack with the valid and
spec bits set.

Such entries can be recognized by inspecting bit 61 of the corresponding
LastBranchStackToIp register. This bit is currently reserved but if found
to be set, the associated branch entry should be discarded.

Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://bugzilla.kernel.org/attachment.cgi?id=305518
Link: https://lore.kernel.org/r/3ad2aa305f7396d41a40e3f054f740d464b16b7f.1706526029.git.sandipan.das@amd.com
arch/x86/events/amd/lbr.c